NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 471

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
12.1.26
12.1.27
f
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
PID—PCI Power Management Capability Identification
Register (SATA–D31:F2)
Address Offset:
Default Value:
PC—PCI Power Management Capabilities Register
(SATA–D31:F2)
Address Offset:
Default Value:
15:11
Bits
15:8
Bits
Bit
7:0
8:6
2:0
10
3
2
1
0
9
5
4
3
Secondary Drive 1 Base Clock (SCB1) — R/W.
0 = 33 MHz base clock for Ultra ATA timings.
1 = 66 MHz base clock for Ultra ATA timings
Secondary Drive 0 Base Clock (SCBO) — R/W.
0 = 33 MHz base clock for Ultra ATA timings.
1 = 66 MHz base clock for Ultra ATA timings
Primary Drive 1 Base Clock (PCB1) — R/W.
0 = 33 MHz base clock for Ultra ATA timings.
1 = 66 MHz base clock for Ultra ATA timings
Primary Drive 0 Base Clock (PCB0) — R/W.
0 = 33 MHz base clock for Ultra ATA timings.
1 = 66 MHz base clock for Ultra ATA timings
Next Capability (NEXT) — RO. Indicates that this is the last item in the list.
Capability ID (CID) — RO. Indicates that this pointer is a PCI power management.
PME Support (PME_SUP) — RO. This field indicates PME# can be generated from the D3
in the SATA host controller.
D2 Support (D2_SUP) — RO. Hardwired to 0. The D2 state is not supported
D1 Support (D1_SUP) — RO. Hardwired to 0. The D1 state is not supported
Auxiliary Current (AUX_CUR) — RO. PME# from D3
is 000b.
Device Specific Initialization (DSI) — RO. Hardwired to 0 to indicate that no device-specific
initialization is required.
Reserved
PME Clock (PME_CLK) — RO. Hardwired to 0 to indicate that PCI clock is not required to generate
PME#.
Version (VER) — RO. Hardwired to 010 to indicates support for Revision 1.1 of the PCI Power
Management Specification.
70
0001h
72
4002h
71h
73h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
COLD
SATA Controller Registers (D31:F2)
state is not supported, therefore this field
RO
16 bits
RO
16 bits
HOT
state
471

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