NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 430
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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LPC Interface Bridge Registers (D31:F0)
10.10
10.10.1
430
Table 10-13. Registers to Control GPIO Address Map
General Purpose I/O Registers (D31:F0)
The control for the general purpose I/O signals is handled through a separate 64-byte I/O space.
The base offset for this space is selected by the GPIOBASE register.
GPIO Register I/O Address Map
GPIOBASE
+ Offset
08–0Bh
0C–0Fh
18–1Bh
1C–1Fh
20–2Bh
2C–2Fh
38–3Bh
00–03h
04–07h
10–13h
14–17h
30–33h
34–37h
GPIO_USE_SEL2
GPIO_USE_SEL
GP_IO_SEL2
GPO_BLINK
GP_IO_SEL
Mnemonic
GP_LVL2
GPI_INV
GP_LVL
—
—
—
—
—
GPIO Use Select
GPIO Input/Output Select
Reserved
GPIO Level for Input or Output
Reserved
Reserved
GPIO Blink Enable
Reserved
Reserved
GPIO Signal Invert
GPIO Use Select 2 [63:32]
GPIO Input/Output Select 2 [63:32]
GPIO Level for Input or Output 2 [63:32]
Output Control Registers
Input Control Registers
Intel
General Registers
Register Name
®
I/O Controller Hub 6 (ICH6) Family Datasheet
E400 FFFFh
1BA83180h
FF3F0000h
00040000h
00000000h
00000006h
00000300h
00030207h
Default
—
—
—
—
—
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
—
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