NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 460

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
SATA Controller Registers (D31:F2)
12.1.6.3
12.1.7
12.1.8
460
When Sub Class Code Register (D31:F2:Offset 0Ah) = 06h
Address Offset:
Default Value:
SCC—Sub Class Code Register (SATA–D31:F2)
Address Offset:
Default Value:
BCC—Base Class Code Register
(SATA–D31:F2SATA–D31:F2)
Address Offset:
Default Value:
Bit
7:0
Bit
7:0
Bit
7:0
Interface (IF) — RO. This field indicates the SATA Controller supports AHCI, rev 1.0.
Sub Class Code (SCC). This field specifies the sub-class code of the controller, per the table
below:
Intel
ICH6-M Only:
ICH6R Only:
Base Class Code (BCC) — RO.
01h = Mass storage device
SCC Register Attribute
MAP.USCC (D31:F2:Offset
MAP.USCC (D31:F2:Offset
®
ICH6 Only:
90h:bit 7)
90h:bit 7)
09h
01h
0Ah
See bit description
0Bh
01h
RO
0b
1b
X
Scc Register Value
01h (IDE Controller)
SCC Register
SCC Register
Attribute
Attribute
R/WO
Intel
RO
RO
Description
Description
Description
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
SCC Default Register
06h (SATA Controller)
04h (RAID Controller)
SCC Register Value
01h (IDE Controller)
RO
8 bits
See bit description
8 bits
RO
8 bits
Value

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