NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 41

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
SMBus
High Precision Event Timers
Timers Based on 82C54
Real-Time Clock
System TCO Reduction Circuits
— New: Flexible SMBus/SMLink architecture
— Provides independent manageability bus
— Supports SMBus 2.0 Specification
— Host interface allows processor to
— Slave interface allows an internal or external
— Compatible with most two-wire components
— Advanced operating system interrupt
— System timer, Refresh request, Speaker tone
— 256-byte battery-backed CMOS RAM
— Integrated oscillator components
— Lower Power DC/DC Converter
— Timers to generate SMI# and Reset upon
— Timers to detect improper processor reset
— Integrated processor frequency strap logic
— Supports ability to disable external devices
to optimize for ASF
through SMLink interface
communicate via SMBus
Microcontroller to access system resources
that are also I
scheduling
output
implementation
detection of system hang
2
C compatible
Interrupt Controller
1.5 V operation with 3.3 V I/O
Integrated 1.5 V Voltage Regulator (INTVR) for
the Suspend and LAN wells
Integrated 2.5 V Regulator for Vcc2_5
Firmware Hub I/F supports BIOS Memory size
up to 8 Mbytes
Low Pin Count (LPC) I/F
GPIO
Package 31x31 mm 609 mBGA
— Supports up to eight PCI interrupt pins
— Supports PCI 2.3 Message Signaled
— Two cascaded 82C59 with 15 interrupts
— Integrated I/O APIC capability with 24
— Supports Processor System Bus interrupt
— 5 V tolerant buffers on IDE, PCI, and Legacy
— Supports two Master/DMA devices.
— Support for Security Device (Trusted
— TTL, Open-Drain, Inversion
Interrupts
interrupts
delivery
signals
Platform Module) connected to LPC.
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