NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 235

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

5.23.1.1.3
5.23.2
5.23.3
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Null field
The remainder of bits contained in each inbound or outbound frame that are not used for Command
/ Response fields or for Stream Packets, are a null field. A null field is transmitted as logical zeros.
Link Reset
A link reset is signaled on the HD Audio link by assertion of the ACZ_RST# signal. Link reset
results in all HD Audio codec and controller interface logic, including registers, being initialized to
their default state. Note however, that codecs may contain critical logic associated with power
management functions, such as power state information or Caller ID in a modem codec, that may
or may not be reset depending on the state of the codec at the time that ACZ_RST# was asserted.
The link reset sequence occurs in response to three classes of events:
Regardless of the reason for entering the link reset state, the link may be existed only under
software control.
Link Power Management
The HD Audio link is designed to support all relevant power management features. In most cases,
all power management state changes are driven by software, either through controller control
registers, or Command verbs to Codecs. The exception to this is when a codec is put into a low
power mode awaiting an external wake up event, such as a ring indication on a modem.
When the HD Audio link is commanded to enter a low power state, it enters the link reset state.
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Reset occurring on the HD Audio controller’s host bus, including system power-up
sequencing.
Software initiating link reset.
Certain software-initiated power management sequences.
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Functional Description
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