NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 69

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NH82801FBM S L89K

Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801FBM S L89K

Lead Free Status / RoHS Status
Compliant
2.16
2.17
2.18
Intel
Table 2-16. Real Time Clock Interface
Table 2-17. Other Clocks
Table 2-18. Miscellaneous Signals (Sheet 1 of 2)
®
I/O Controller Hub 6 (ICH6) Family Datasheet
Real Time Clock Interface
Other Clocks
Miscellaneous Signals
SATA_CLKP
SATA_CLKN
DMI_CLKP,
DMI_CLKN
INTVRMEN
RTCRST#
RTCX1
RTCX2
CLK14
CLK48
Name
Name
SPKR
Name
Type
Special
Special
Type
Type
I
I
I
I
O
I
I
Oscillator Clock: Used for 8254 timers. Runs at 14.31818 MHz. This clock is
permitted to stop during S3 (or lower) states.
48 MHz Clock: Used to run the USB controller. Runs at 48.000 MHz. This clock is
permitted to stop during S3 (or lower) states.
100 MHz Differential Clock: These signals are used to run the SATA controller.
Runs at 100 MHz. This clock is permitted to stop during S3 (or lower) states in
desktop configurations or S1 (or lower) states.
100 MHz Differential Clock: These signals are used to run the Direct Media
Interface. Runs at 100 MHz.
Internal Voltage Regulator Enable: This signal enables the internal 1.5 V
Suspend regulator when connected to VccRTC. When connected to Vss, the
internal regulator is disabled
Speaker: The SPKR signal is the output of counter 2 and is internally “ANDed”
with Port 61h bit 1 to provide Speaker Data Enable. This signal drives an external
speaker driver device, which in turn drives the system speaker. Upon PLTRST#,
its output state is 0.
NOTE: SPKR is sampled at the rising edge of PWROK as a functional strap. See
RTC Reset: When asserted, this signal resets register bits in the RTC well.
NOTES:
1. Unless CMOS is being cleared (only to be done in the G3 power state), the
2. In the case where the RTC battery is dead or missing on the platform, the
Crystal Input 1: This signal is connected to the 32.768 kHz crystal. If no external
crystal is used, then RTCX1 can be driven with the desired clock rate.
Crystal Input 2: This signal is connected to the 32.768 kHz crystal. If no external
crystal is used, then RTCX2 should be left floating.
RTCRST# input must always be high when all other RTC power planes are on.
RTCRST# pin must rise before the RSMRST# pin.
Section 2.22.1
resistor on SPKR pin.
for more details. There is a weak integrated pull-down
Description
Description
Description
Signal Description
69

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