NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 349

• Manufacturer Part Number: NH82801FBM S L89K
• Manufacturer: Intel

Specifications of NH82801FBM S L89K

• Lead Free Status / RoHS Status: Compliant

10.1.12
10.1.13
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
PMBASE—ACPI Base Address Register (LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
Sets base address for ACPI I/O registers, GPIO registers and TCO I/O registers. These registers
can be mapped anywhere in the 64-K I/O space on 128-byte boundaries.
ACPI_CNTL—ACPI Control Register (LPC I/F — D31:F0)
Offset Address:
Default Value:
Lockable:
Bit
31:16
6:3
2:0
15:7
7
Bit
6:1
0
ACPI Enable (ACPI_EN) — R/W.
0 = Disable.
1 = Decode of the I/O range pointed to by the ACPI base register is enabled, and the ACPI power
Reserved
SCI IRQ Select (SCI_IRQ_SEL) — R/W. This field specifies on which IRQ the SCI will internally
appear. If not using the APIC, the SCI must be routed to IRQ9–11, and that interrupt is not sharable
with the SERIRQ stream, but is shareable with other PCI interrupts. If using the APIC, the SCI can
also be mapped to IRQ20–23, and can be shared with other interrupts.
NOTE: When the TCO interrupt is mapped to APIC interrupts 9, 10 or 11, the signal is in fact active
Reserved
Base Address — R/W. This field provides 128 bytes of I/O space for ACPI, GPIO, and TCO logic.
This is placed on a 128-byte boundary.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate I/O space.
management function is enabled. Note that the APM power management ranges (B2/B3h) are
always enabled and are not affected by this bit.
000b
001b
010b
100b
101b
011b
110b
111b
Bits
high. When the TCO interrupt is mapped to IRQ 20, 21, 22, or 23, the signal is active low
and can be shared with PCI interrupts that may be mapped to those same signals (IRQs).
40
00000001h
No
44h
00h
No
–
43h
SCI Map
IRQ9
IRQ10
IRQ11
Reserved
IRQ20 (Only available if APIC enabled)
IRQ21 (Only available if APIC enabled)
IRQ22 (Only available if APIC enabled)
IRQ23 (Only available if APIC enabled)
Description
Description
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
Usage:
Power Well:
Attribute:
Size:
Usage:
Power Well:
R/W, RO
32 bit
ACPI, Legacy
Core
R/W
8 bit
ACPI, Legacy
Core
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