MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 215

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
8.13.3 Interrupt Vectors
MC68336/376
USER’S MANUAL
When the QADC is the only module with an interrupt request pending at the level being
acknowledged, or when the QADC IARB value is higher than that of other modules
with requests pending at the acknowledged IRQ level, the QADC responds to the in-
terrupt acknowledge cycle with an 8-bit interrupt vector number. The CPU32 uses the
vector number to calculate a displacement into the exception vector table, then uses
the vector at that location to jump to an interrupt service routine.
The interrupt vector base field IVB[7:2] specifies the six high-order bits of the 8-bit in-
terrupt vector number, and the QADC provides two low-order bits which correspond to
one of the four QADC interrupt sources.
Figure 8-11 shows the format of the interrupt vector, and lists the binary coding of the
two low-order bits for the four QADC interrupt sources.
The IVB field has a reset value of $0F, which corresponds to the uninitialized interrupt
exception vector.
IVB7
IVB7
7
7
INTERRUPT REGISTER PROVIDED
QADC INTERRUPT VECTOR NUMBER PROVIDED
IVB6
IVB6
6
6
DURING INTERRUPT ARBITRATION
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE
BY SOFTWARE
Figure 8-11 QADC Interrupt Vector Format
IVB5
IVB5
5
5
IVB4
IVB4
4
4
IVB3
IVB3
3
3
IVB2
IVB2
2
2
IVB1
IVB1
1
1
1
0
0
1
IVB0
IVB0
0
1
0
1
0
0
— QUEUE 1 COMPLETION SOFTWARE INTERRUPT
— QUEUE 1 PAUSE SOFTWARE INTERRUPT
— QUEUE 2 COMPLETION SOFTWARE INTERRUPT
— QUEUE 2 PAUSE SOFTWARE INTERRUPT
VECTOR BITS PROVIDED
BY QADC
MOTOROLA
QADC SWI VECT
8-33

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