MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 367

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
BITS[3:0] — Bits Per Transfer
CPOL — Clock Polarity
CPHA — Clock Phase
SPBR[7:0] — Serial Clock Baud Rate
MC68336/376
USER’S MANUAL
In master mode, when BITSE is set in a command RAM byte, BITS[3:0] determines
the number of data bits transferred. When BITSE is cleared, eight bits are transferred.
Reserved values default to eight bits. In slave mode, the command RAM is not used
and the setting of BITSE has no effect on QSPI transfers. Instead, the BITS[3:0] field
determines the number of bits the QSPI will receive during each transfer before storing
the received data.
Table D-34 shows the number of bits per transfer.
CPOL is used to determine the inactive state of the serial clock (SCK). It is used with
CPHA to produce a desired clock/data relationship between master and slave devices.
CPHA determines which edge of SCK causes data to change and which edge causes
data to be captured. CPHA is used with CPOL to produce a desired clock/data rela-
tionship between master and slave devices.
The QSPI uses a modulus counter to derive the SCK baud rate from the MCU system
clock. Baud rate is selected by writing a value from 2 to 255 into SPBR[7:0]. The
following equation determines the SCK baud rate:
0 = The inactive state of SCK is logic zero.
1 = The inactive state of SCK is logic one.
0 = Data is captured on the leading edge of SCK and changed on the trailing edge
1 = Data is changed on the leading edge of SCK and captured on the trailing edge
of SCK.
of SCK
Table D-34 Bits Per Transfer
BITS[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
REGISTER SUMMARY
Bits per Transfer
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
16
10
11
12
13
14
15
8
9
MOTOROLA
D-49

Related parts for MC68376BAMFT20