MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 35

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

3.1 MCU Features
3.1.1 Central Processing Unit (CPU32)
3.1.2 System Integration Module (SIM)
3.1.3 Standby RAM Module (SRAM)
3.1.4 Masked ROM Module (MRM)
MC68336/376
USER’S MANUAL
This section contains information about the entire MC68336/376 modular microcon-
troller. It lists the features of each module, shows device functional divisions and pin
assignments, summarizes signal and pin functions, discusses the intermodule bus,
and provides system memory maps. Timing and electrical specifications for the entire
microcontroller and for individual modules are provided in APPENDIX A ELECTRI-
CAL CHARACTERISTICS. Comprehensive module register descriptions and memo-
ry maps are provided in APPENDIX D REGISTER SUMMARY.
The following paragraphs highlight capabilities of each of the microcontroller modules.
Each module is discussed separately in a subsequent section of this user's manual.
• 32-bit architecture
• Virtual memory implementation
• Table look-up and interpolate instruction
• Improved exception handling for controller applications
• High level language support
• Background debug mode
• Fully static operation
• External bus support
• Programmable chip select outputs
• System protection logic
• Watchdog timer, clock monitor and bus monitor
• Two 8-bit dual function input/output ports
• One 7-bit dual function output port
• Phase-locked loop (PLL) clock system
• 4-Kbytes of static RAM
• No standby supply
• 8-Kbyte array, accessible as bytes or words
• User selectable default base address
• User selectable bootstrap ROM function
• User selectable ROM verification code
SECTION 3 OVERVIEW
OVERVIEW
MOTOROLA
3-1