MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 370

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
SPCR3 — QSPI Control Register
ENDQP[3:0] — Ending Queue Pointer
Bits [7:4] — Not Implemented
NEWQP[3:0] — New Queue Pointer Value
D.6.14 QSPI Control Register 3
Bits [15:11] — Not Implemented
LOOPQ — QSPI Loop Mode
HMIE — HALTA and MODF Interrupt Enable
HALT — Halt QSPI
D-52
MOTOROLA
15
0
0
RESET:
This field contains the last QSPI queue address.
This field contains the first QSPI queue address.
SPCR3 contains the loop mode enable bit, halt and mode fault interrupt enable, and
the halt control bit. The CPU32 has read/write access to SPCR3, but the QSM has
read access only. SPCR3 must be initialized before QSPI operation begins. Writing a
new value to SPCR3 while the QSPI is enabled disrupts operation.
LOOPQ controls feedback on the data serializer for testing.
HMIE enables interrupt requests generated by the HALTA status flag or the MODF
status flag in SPSR.
When HALT is set, the QSPI stops on a queue boundary. It remains in a defined state
from which it can later be restarted.
0 = Feedback path disabled.
1 = Feedback path enabled.
0 = HALTA and MODF interrupts disabled.
1 = HALTA and MODF interrupts enabled.
0 = QSPI operates normally.
1 = QSPI is halted for subsequent restart.
14
0
0
13
0
0
12
0
0
11
0
0
LOOPQ
10
0
REGISTER SUMMARY
HMIE
9
0
HALT
8
0
7
6
5
4
SPSR
3
USER’S MANUAL
2
MC68336/376
$YFFC1E
1
0

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