MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 418

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

BIUTEST D-58
BKPT 4-19, 5-31, 5-41, 5-50
BKPT (TPU asserted) D-76
BL D-76
BLC D-75
Block size (BLKSZ) 5-58, D-17
BM D-76
BME 5-15, D-13
BMT 5-14, D-13
BOFFINT D-95
BOFFMSK D-89
BOOT 7-3, D-25
Boot ROM
Bootstrap words (ROMBS) 7-1
Boundary conditions 8-19
BP D-76
BQ2 D-35
BR 5-37, 5-38, 5-58
Branch latch control (BLC) D-75
Break frame 9-25
Breakpoint
Brushless motor commutation (COMM) 11-12
BSA 4-19
BSL D-64
BT D-76
Built-in emulation memory C-1
Bus
MOTOROLA
I-2
external signal 4-20
encoding 5-59, D-17
control(BOOT) D-25
acknowledge cycle 5-31
asserted flag (BKPT) D-76
enable bits D-76
flag (PCBK) D-76
hardware breakpoints 5-31
instruction 4-18
mode selection 5-45
operation 5-33
software breakpoints 5-31
arbitration
cycle
error
grant (BG) 5-38
grant acknowledge (BGACK) 5-38
interface
monitor 5-14
off interrupt
single device 5-39
timing diagrams
regular 5-27
termination sequences 5-34
exception processing 5-36
signal (BERR) 5-14, 5-23, 5-36
timing of 5-36
unit submodule. See BIUSM 10-1, 10-3
external enable (BME) D-13
timeout period 5-15
timing (BMT) 5-14, D-13
active A-15
idle A-16
BUSY 13-4, 13-15
BYP 8-14, D-37
Bypass mode 8-14
BYTE (upper/lower byte option) 5-59, D-18
C (carry) flag 4-6, D-4
CAN2.0B
CANCTRL0 D-88
CANCTRL1 D-90
CANCTRL2 D-91
CANICR D-88
CANMCR D-85
CANRX/TX pins 13-2
CCL D-76
CCR 4-6
CCW 8-1, 8-28, D-37
CF1 D-35
CF2 D-35
CFSR D-78
CH D-77, D-79, D-80
CHAN D-37
CHANNEL D-78
Channel
CHBK D-77
Chip-select
request (BR) 5-38
select (BSL) D-64
state analyzer (BSA) 4-19
controller module. See TouCAN 13-1
protocol 13-1
system 13-2
assignments
conditions latch (CCL) D-76
control registers 11-15
function select registers 11-15
interrupt
invalid D-37
number (CHAN) D-37
orthogonality 11-4
priority registers 11-17
register breakpoint flag (CHBK) D-77
reserved D-37
base address
operation 5-60
option
(BOFFINT) D-95
mask (BOFFMSK) D-89
multiplexed D-38
nonmultiplexed D-38
base vector (CIBV) D-77
enable
request level (CIRL) D-77
status (CH) D-80
register boot ROM (CSBARBT) D-17
registers (CSBAR) 5-57, 5-58, D-17
/disable field (CH) D-77
and status registers 11-15
reset values 5-63
–C–
USER’S MANUAL
MC68336/376