MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 96

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

5.4.7 Interrupt Priority and Vectoring
5-18
MOTOROLA
Either clock signal selected by the PTP is divided by four before driving the modulus
counter. The modulus counter is initialized by writing a value to the periodic interrupt
timer modulus (PITM[7:0]) field in PITR. A zero value turns off the periodic timer. When
the modulus counter value reaches zero, an interrupt is generated. The modulus
counter is then reloaded with the value in PITM[7:0] and counting repeats. If a new
value is written to PITR, it is loaded into the modulus counter when the current count
is completed.
When a fast reference frequency is used, the PIT period can be calculated as follows:
When an externally input clock frequency is used, the PIT period can be calculated as
follows:
Interrupt priority and vectoring are determined by the values of the periodic interrupt
request level (PIRQL[2:0]) and periodic interrupt vector (PIV) fields in the periodic in-
terrupt control register (PICR).
The PIRQL field is compared to the CPU32 interrupt priority mask to determine wheth-
er the interrupt is recognized. Table 5-8 shows PIRQL[2:0] priority values. Because of
SIM hardware prioritization, a PIT interrupt is serviced before an external interrupt re-
quest of the same priority. The periodic timer continues to run when the interrupt is dis-
abled.
The PIV field contains the periodic interrupt vector. The vector is placed on the IMB
when an interrupt request is made. The vector number is used to calculate the address
of the appropriate exception vector in the exception vector table. The reset value of
the PIV field is $0F, which corresponds to the uninitialized interrupt exception vector.
PIT Period
PIT Period
PIRQL[2:0]
Table 5-8 Periodic Interrupt Priority
000
001
010
011
100
101
110
111
=
SYSTEM INTEGRATION MODULE
------------------------------------------------------------------------------------------------------------------------------------ -
=
128 PITM[7:0] 1 if PTP = 0, 512 if PTP = 1 4
---------------------------------------------------------------------------------------------------------------------
PITM[7:0] 1 if PTP = 0, 512 if PTP = 1 4
Periodic interrupt disabled
Interrupt priority level 1
Interrupt priority level 2
Interrupt priority level 3
Interrupt priority level 4
Interrupt priority level 5
Interrupt priority level 6
Interrupt priority level 7
Priority Level
f
f
ref
ref
USER’S MANUAL
MC68336/376