MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 78
MC68376BAMFT20
Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68376BAMFT20.pdf
(434 pages)
Specifications of MC68376BAMFT20
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
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4.10.11 Deterministic Opcode Tracking
4.10.12 On-Chip Breakpoint Hardware
4-26
MOTOROLA
CPU32 function code outputs are augmented by two supplementary signals to monitor
the instruction pipeline. The instruction pipe (IPIPE) output indicates the start of each
new instruction and each mid-instruction pipeline advance. The instruction fetch
(IFETCH) output identifies the bus cycles in which the operand is loaded into the in-
struction pipeline. Pipeline flushes are also signaled with IFETCH. Monitoring these
two signals allows a bus state analyzer to synchronize itself to the instruction stream
and monitor its activity.
An external breakpoint input and on-chip breakpoint hardware allow a breakpoint trap
on any memory access. Off-chip address comparators preclude breakpoints unless
show cycles are enabled. Breakpoints on instruction prefetches that are ultimately
flushed from the instruction pipeline are not acknowledged; operand breakpoints are
always acknowledged. Acknowledged breakpoints initiate exception processing at the
address in exception vector number 12, or alternately enter background mode.
CENTRAL PROCESSOR UNIT
USER’S MANUAL
MC68336/376
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