MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 405

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

FRZACK — TouCAN Disable
SUPV — Supervisor/User Data Space
SELFWAKE — Self Wake Enable
APS — Auto Power Save
STOPACK — Stop Acknowledge
MC68336/376
USER’S MANUAL
When the TouCAN enters debug mode, it sets the FRZACK bit. This bit should be
polled to determine if the TouCAN has entered debug mode. When debug mode is ex-
ited, this bit is negated once the TouCAN prescaler is enabled.
This is a read-only bit.
The SUPV bit places the TouCAN registers in either supervisor or user data space.
The SELFWAKE bit allows the TouCAN to wake up when bus activity is detected after
the STOP bit is set. If this bit is set when the TouCAN enters low-power stop mode,
the TouCAN will monitor the bus for a recessive to dominant transition. If a recessive
to dominant transition is detected, the TouCAN immediately clears the STOP bit and
restarts its clocks.
If a write to CANMCR with SELFWAKE set occurs at the same time a recessive-to-
dominant edge appears on the CAN bus, the bit will not be set, and the module clocks
will not stop. The user should verify that this bit has been set by reading CANMCR.
Refer to 13.6.2 Low-Power Stop Mode for more information on entry into and exit
from low-power stop mode.
The APS bit allows the TouCAN to automatically shut off its clocks to save power when
it has no process to execute, and to automatically restart these clocks when it has a
task to execute without any CPU32 intervention.
When the TouCAN is placed in low-power stop mode and shuts down its clocks, it sets
the STOPACK bit. This bit should be polled to determine if the TouCAN has entered
low-power stop mode. When the TouCAN exits low-power stop mode, the STOPACK
bit is cleared once the TouCAN’s clocks are running.
0 = The TouCAN has exited debug mode and the prescaler is enabled.
1 = The TouCAN has entered debug mode, and the prescaler is disabled.
0 = Registers with access controlled by the SUPV bit are accessible in either user
1 = Registers with access controlled by the SUPV bit are restricted to supervisor
0 = Self wake disabled.
1 = Self wake enabled.
0 = Auto power save mode disabled; clocks run normally.
1 = Auto power save mode enabled; clocks stop and restart as needed.
or supervisor privilege mode.
mode.
The SELFWAKE bit should not be set if the LPSTOP instruction is to
be executed because LPSTOP stops all system clocks, thus shutting
down all modules.
REGISTER SUMMARY
NOTE
MOTOROLA
D-87