TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 123

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

31-24
23-16
15-14
13-10
9-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
7.6.2.19
Note:For descriptions of interrupts and interrupt numbers, see Section "7.5.1.5 List of Interrupt Sources".
−
CLRPEND
−
CLRPEND
−
Bit Symbol
(Interrupt 87)
CLRPEND
Undefined
Undefined
Undefined
Undefined
Interrupt Clear-Pending Register 3
31
23
15
7
-
-
-
R/W
R/W
R/W
R/W
R/W
Type
(Interrupt 86)
CLRPEND
Undefined
Undefined
Undefined
Undefined
30
22
14
6
Write as 0.
Interrupt number [87:80]
[Write]
1: Clear pending interrupt
[Read]
0: Not pending
1: Pending
Each bit corresponds to the specified number can force interrupts into the pending state and determines
which interrupts are currently pending.
Writing "1" to a bit in this register clears the corresponding pending interrupt. However, writing "1" has no ef-
fect on an interrupt that is already being serviced. Writing "0" has no effect.
Reading the bit returns the current state of the corresponding interrupts.
Write as 0.
Interrupt number [77:74]
[Write]
1: Clear pending interrupt
[Read]
0: Not pending
1: Pending
Each bit corresponds to the specified number can force interrupts into the pending state and determines
which interrupts are currently pending.
Writing "1" to a bit in this register clears the corresponding pending interrupt. However, writing "1" has no ef-
fect on an interrupt that is already being serviced. Writing "0" has no effect.
Reading the bit returns the current state of the corresponding interrupts.
Write as 0.
-
-
-
(Interrupt 85)
(Interrupt 77)
CLRPEND
CLRPEND
Undefined
Undefined
Undefined
Undefined
29
21
13
5
-
-
(Interrupt 84)
(Interrupt 76)
CLRPEND
CLRPEND
Undefined
Undefined
Undefined
Undefined
Page 99
28
20
12
4
-
-
(Interrupt 83)
(Interrupt 75)
CLRPEND
CLRPEND
Undefined
Undefined
Undefined
Undefined
27
19
11
Function
3
-
-
(Interrupt 82)
(Interrupt 74)
CLRPEND
CLRPEND
Undefined
Undefined
Undefined
Undefined
26
18
10
2
-
-
(Interrupt 81)
CLRPEND
Undefined
Undefined
Undefined
Undefined
25
17
9
1
-
-
-
TMPM361F10FG
(Interrupt 80)
CLRPEND
Undefined
Undefined
Undefined
Undefined
24
16
8
0
-
-
-