TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 25

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

1.1
The TMPM361F10FG is a 32-bit RISC microprocessor series with an ARM Cortex-M3 microprocessor core.
Features of the TMPM361F10FG are as follows :
Features
1. ARM Cortex-M3 microprocessor core
2. On Chip program memory and data memory
3. Static memory controller (SMC)
4. DMA controller (DMAC) : 2channels
a. Improved code efficiency has been realized through the use of Thumb-2 instruction.
b. Both high performance and low power consumption have been achieved.
c. High-speed interrupt response suitable for real-time control
・ On-chip RAM : 64Kbyte
・ On-chip Flash ROM : 1024Kbyte
・ Possible to expand within16MB(Both program and data)
・ External data bus (Multiplex bus) : 16-bit data bus width
・ Chip select / Wait controller : 4 channels
Transfer target : Internal memory, Internal I/O and External memory
・ New 16-bit Thumb instructions for improved program flow
・ New 32-bit Thumb instructions for improved performance
・ New Thumb mixed 16- / 32-bit instruction set can produce faster, more efficient code.
[High performance]
・ Both high performance and low power consumption have been achieved.
・ Division takes between 2 and 12 cycles depending on dividend and devisor
[Low Power consumption]
・ Optimized design using a low power consumption library
・ Standby function that stops the operation of the micro controller core
・ An interruptible long instruction
・ Stack push automatically handled by hardware
RAM size includes BACKUP RAM AREA (8KB).
TMPM361F10FG
Product name
TMPM361F10FG
1024 Kbyte
(FLASH)
ROM
Page 1
64 Kbyte
RAM
LQFP100-P-1414-0.50H
Package
TMPM361F10FG