TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 149

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

8.1.3
Table 8-2 Port conditions in STOP mode
ο : Input or output enabled
× : Input or output disabled
ing port
Exclud-
Port
<DRVE>=0, both input and output are disabled in STOP mode except for some ports even if PxIE or PxCR
are enabled.
Port states in STOP Mode
Input and output in STOP mode are enabled / disabled by the CGSTBYCR<DRVE> bit.
If PxIE or PxCR is enabled with <DRVE>=1, input or output is enabled respectively in STOP mode.If
Table 8-2 shows the pin conditions in STOP mode.
X1, XT1
X2, XT2
RESET, NMI, MODE
PL3, PL7, PM3, PM7, PN3, PE7, PG3,
PG7, , PI2, PI3
(When used for interrupt
(PxFRn<PxmFn>=1) and input is enabled
(PxIE<PxmIE>=1)) (Note)
PJ4,PJ5, PJ6, PJ7
(When used for KWUP (PxFRn<PxmFn>=1)
and input is enabled (PxIE<PxmIE>=1))
(Note)
PF0, PF1, PF2, PF3, PF4
(When used for trace data output
(PxFRn<PxmFn>=1)) (Note)
PA7-PA0, PB7-PB0, PE6-PE0, PP6-PP2,
PP0
(When used for external bus
(PxFRn<PxmFn>=1) and input is enabled
for data bus (PxIE<PxmIE>=1)) (Note)
Other ports
Note:"x" indicates a port number, "m" a corresponding bit and "n" a function register number.
Pin name
Output only
Input only
Input only
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
I/O
Page 125
"High" Level Output
<DRVE> = 0
×
ο
ο
×
ο
×
×
ο
×
×
Depend on PxCR[m]
Depend on PxCR[m]
Depend on PxCR[m]
Depend on PxCR[m]
Depend on PxCR[m]
Depend on PxCR[m]
Depend on PxCR[m]
"High"Level Output
<DRVE> = 1
TMPM361F10FG
×
ο
ο
ο
ο