TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 19

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

16. Remote control signal preprocessor(RMC)
17. Watchdog Timer(WDT)
16.1 Basic operation....................................................................................................................483
16.2 Block Diagram.....................................................................................................................483
16.3 Registers..............................................................................................................................484
16.4 Operation Description.........................................................................................................497
17.1 Configuration.......................................................................................................................507
17.2 Register................................................................................................................................508
17.3 Operations............................................................................................................................510
17.4 Operation when malfunction (runaway) is detected...........................................................511
17.5 Control register....................................................................................................................513
15.4.3
15.4.4
16.1.1
16.3.1
16.3.2
16.3.3
16.3.4
16.3.5
16.3.6
16.3.7
16.3.8
16.3.9
16.3.10
16.3.11
16.3.12
16.3.13
16.3.14
16.3.15
16.4.1
17.2.1
17.2.2
17.3.1
17.3.2
17.4.1
17.4.2
17.5.1
17.5.2
17.5.3
15.4.2.3
15.4.2.4
15.4.2.5
15.4.2.6
15.4.3.1
15.4.3.2
15.4.3.3
15.4.3.4
15.4.3.5
15.4.3.6
16.4.1.1
16.4.1.2
16.4.1.3
16.4.1.4
16.4.1.5
16.4.1.6
16.4.1.7
16.4.1.8
17.5.3.1
Transmission..................................................................................................................................................................477
Software Reset...............................................................................................................................................................482
Reception of Remote Control Signal............................................................................................................................483
Register List...................................................................................................................................................................484
RMCEN(Enable Register).............................................................................................................................................485
RMCREN(Receive Enable Register)............................................................................................................................486
RMCRBUF1(Receive Data Buffer Register 1)............................................................................................................487
RMCRBUF2(Receive Data Buffer Register 2)............................................................................................................487
RMCRBUF3(Receive Data Buffer Register 3)............................................................................................................488
RMCRCR1(Receive Control Register 1)......................................................................................................................489
RMCRCR2(Receive Control Register 2) ....................................................................................................................490
RMCRCR3(Receive Control Register 3) ....................................................................................................................491
Reception of Remote Control Signal............................................................................................................................497
WDMOD(Watchdog Timer Mode Register) ...............................................................................................................508
WDCR (Watchdog Timer Control Register)................................................................................................................509
Basic Operation.............................................................................................................................................................510
Operation Mode and Status...........................................................................................................................................510
INTWDT interrupt generation.......................................................................................................................................511
Internal reset generation................................................................................................................................................512
Watchdog Timer Mode Register (WDMOD)...............................................................................................................513
Watchdog Timer Control Register(WDCR).................................................................................................................513
Setting example.............................................................................................................................................................514
RMCRCR4(Receive Control Register 4) ..................................................................................................................492
RMCRSTAT(Receive Status Register) .....................................................................................................................493
RMCEND1(Receive End bit Number Register 1) ....................................................................................................494
RMCEND2(Receive End bit Number Register 2) ....................................................................................................494
RMCEND3(Receive End bit Number Register 3) ....................................................................................................495
RMCFSSEL(Source Clock selection Register) .........................................................................................................496
Enabling Reception
Detecting Error Interrupt
Details of reception error
Stopping Reception
Basic Operation
Preconfiguration
Detecting Transmission Error
Details of Transmission Error
Stopping Transmission
Retransmission
Sampling clock
Basic operation
Preparation
Enabling Reception
Stopping Reception
Receiving Remote Control Signal without Leader in Waiting Leader
A Leader only with Low Width
Receiving a Remote Control Signal in a Phase Method
Disabling control
xi