TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 328

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

11.5
Description of Operations for Each Circuit
11.5
Table 11-2 Prescaler Output Clock Resolutions (fc = 64MHz, fs = 32.768kHz)
11.5.1
Select φT0
CGSYSCR
<FPSEL1>
0
The channels operate in the same way, except for the differences in their specifications as shown in Table 11-1.
Description of Operations for Each Circuit
ted by CGSYSCR<FPSEL1> in the CG. The peripheral clock, fperiph, is either fgear, a clock selected by
CGSYSCR<FPSEL0> in the CG, or fc, which is a clock before it is divided by the clock gear.
ing and writing "0" clears and stops counting. Below tables show prescaler output clock resolutions.
There is a 4-bit prescaler to generate the source clock for up-counter UC.
The prescaler input clock φT0 is fs, fperiph/1, fperiph/2, fperiph/4, fperiph/8, fperiph/16 or fperiph/32 selec-
The operation or the stoppage of a prescaler is set with TBxRUN<TBPRUN> where writing "1" starts count-
Prescaler
Select peripheral
CGSYSCR
<FPSEL0>
0 (fgear)
clock
Select gear clock
<GEAR[2:0]>
CGSYSCR
100 (fc/2)
101 (fc/4)
110 (fc/8)
000 (fc)
Select prescaler
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
<PRCK[2:0]>
CGSYSCR
Page 304
clock
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
1
2
2
3
3
3
4
4
4
4
(0.0312 μs)
(0.0625 μs)
(0.0625 μs)
5
6
5
6
7
5
6
7
8
5
6
7
8
9
(0.125 μs)
(0.125 μs)
(0.125 μs)
φT1
(0.25 μs)
(0.25 μs)
(0.25 μs)
(0.25 μs)
(0.5 μs)
(1.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
Prescaler output clock function
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
3
10
10
11
4
4
5
6
7
8
5
6
7
8
9
5
6
7
8
9
6
7
8
9
(0.125 μs)
φT4
(0.25 μs)
(0.25 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
TMPM361F10FG
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
13
10
10
11
10
11
12
10
11
12
5
6
7
8
9
6
7
8
9
7
8
9
8
9
φT16
(128.8 μs)
(16.0 μs)
(16.0 μs)
(32.0 μs)
(16.0 μs)
(32.0 μs)
(64.0 μs)
(16.0 μs)
(32.0 μs)
(64.0 μs)
(0.5 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(1.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(2.0 μs)
(4.0 μs)
(8.0 μs)
(4.0 μs)
(8.0 μs)