TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 76

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

6.6
Low Power Consumption Modes
Table 6-7 Operational Status in Each Mode
ο : Operating
− : Clock stopped automatically after the setting mode. (note7)
Δ : Operating / stopped can be selected by software.
# : Before enter the setting mode, must stop these module operations by software.
× : After transition the setting mode, power down these module automatically.
* : After transition the setting mode, must stop these module operations by software.
・ : Before enter the setting mode, operating / stopped can be selected by software.
Processor core
DMAC
INTC
SMC
I/O port
ADC
SIO
SBI
TMRB
WDT
SSP
KWUP
CEC
RMC
RTC
CG
PLL
High-speed oscilla-
tor (fc)
Low-speed oscilla-
tor (fs)
Main RAM
BACKUP RAM
(note 2)
6.6.6
Block
Operational Status in Each Mode
Note 1: In IDLE1 mode, the PLL, SMC, DMAC, ADC, SSP can not be used, under the limited channel of TMRB, SIO,
Note 2: It depends on CGSTBYCR<DRVE>.
Note 3: It depends on CGSTBYCR<PTKEEP>.
Note 4: When low-speed oscillator is stopped or stopped automatically, only static pull-up will be valid.
Note 5: Before transition the setting mode, clear ADMOD<VREFON> to "0".
Note 6: Port state before transition the low power consumption mode is kept.
Note 7: The clock supplied to the module is stopped automatically after transition the setting mode. Therefore, transit
Table 6-7 shows the operational status in each mode.
SBI, it must run on max. frequency fsys=1MHz (fosc=8MHz, PLL stopped, clock gear 1/8).
the setting mode after comfirming the stop of the each module.
NORMAL
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
# (note 5)
SLOW
Δ
ο
−
ο
−
ο
#
#
ο
#
#
ο
ο
ο
ο
ο
ο
ο
ο
*
o (note 6)
ο(note 4)
IDLE2
・
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
−
ο
ο
ο
−
ο
ο
ο
ο
ο
Page 52
ο (note 6)
# (note 5)
ο(note 4)
(note 1)
IDLE1
・
−
−
−
−
Δ
Δ
ο
#
#
#
#
ο
ο
#
ο
ο
ο
ο (note 6)
− (note 5)
SLEEP
−
−
ο
−
−
−
−
−
−
ο
ο
ο
ο
ο
#
−
ο
ο
ο
ο (note 2)
− (note 5)
ο(note 4)
STOP
−
−
ο
−
−
−
−
−
−
−
−
−
ο
#
−
−
ο
ο
Δ (note 3)
BACKUP
SLEEP
# , ×
TMPM361F10FG
Δ
Δ
Δ
Δ
×
×
×
×
×
×
×
×
×
×
ο
−
ο
×
ο
Δ (note 2 / 3)
Δ(note 4)
BACKUP
STOP
# , ×
×
×
×
×
×
×
×
×
×
×
−
−
−
−
−
×
ο
ο