TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 66

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

6.3
Clock control
CGPLLSEL<PLLSEL>= “0” (X1 selected)
CGOSCCR<PLLON>= “0” (PLL stop)
CGOSCCR<RS,IS,C2S,ND>
CGOSCCR<PLLON>= “1” (PLL active)
CGPLLSEL<PLLSEL>= “1” (PLL active)
Selected system clock can be used.
Set PLL operation
Changing of PLL setting
Setting of X1
PLL stopped
Set clock multiplication by PLL
Set PLL
Operation flow
Figure 6-3 Changing the PLL setting
Page 42
Before setting, oscillation should be stable.
Initialized the 4 times multiplication of osc
by CGOSCCR<PLLON>= “1”→“0” (PLL stop)
It takes 100μs or more for the PLL to be
stabilized when changed PLL setting to hole the
CGOSCCR<PLLON>= “0” (PLL stop)
It takes approx 200μs for the PLL to be stabilized.
To hold the CGOSCCR<PLLON>=” 1” (PLL active).
Note
TMPM361F10FG