TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 401

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TMPM361F10FG

Manufacturer Part Number
TMPM361F10FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM361F10FG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
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Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14Ã?14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
3
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM361F10FG
Manufacturer:
Toshiba
Quantity:
10 000
(2)
SCLK Input Mode
・ If SCxMOD2<WBUF> is set to "0" and the transmit double buffer is disabled
・ If SCxMOD2<WBUF> is set to "1" and the double buffer is enabled.
<WBUF> settings.
is shifted into the receive buffer when the SCLK input becomes active.The INTTXx inter-
rupt is generated upon completion of data transmission. The INTTRXx interrupt is gener-
ated when the data is moved from shift register to receive buffer after completion of data re-
ception.
for the next frame (data must be written before the point A in Figure 10-17). Data must be
read before completing reception of the next frame data.
the transmit shift register after completing data transmission from the transmit shift regis-
ter. At the same time, data received is shifted to the shift register, it is moved to the re-
ceive buffer, and the INTRXx interrupt is generated.
for the next frame (data must be written before the point A in Figure 12-17). Data must be
read before completing reception of the next frame data.
which data has been moved from transmit buffer) is started while receive data is shifted in-
to receive shift register simultaneously.
run error occurs. Similarly, if there is no data written to transmit buffer when SCLK for
the next frame is input, an under-run error occurs.
When receiving data, double buffer is always enabled regardless of the SCxMOD2
8-bit data written in the transmit buffer is outputted from the TXD pin and 8 bit of data
Note that transmit data must be written into the transmit buffer before the SCLK input
The interrupt INTRXx is generated at the timing the transmit buffer data is moved to
Note that transmit data must be written into the transmit buffer before the SCLK input
Upon the SCLK input for the next frame, transmission from transmit shift register (in
If data in receive buffer has not been read when the last bit of the frame is received, an over-
Page 377
TMPM361F10FG

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