TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 9

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

specification
2. Processor Core
3. Debug Interface
4. Memory Map
Introduction: Notes on the description of SFR (Special Function Register) under this
TMPM361F10FG
1.1 Features......................................................................................................................................1
1.2 Block Diagram...........................................................................................................................4
1.3 Pin layout (Top view)................................................................................................................5
1.4 Pin names and Functions...........................................................................................................6
1.5 Pin Numbers and Power Supply Pins.....................................................................................13
2.1 Information on the processor core..........................................................................................15
2.2 Configurable Options..............................................................................................................15
2.3 Exceptions / Interruptions.......................................................................................................16
2.4 Events......................................................................................................................................17
2.5 Power Management.................................................................................................................17
2.6 Exclusive access......................................................................................................................17
3.1 Specification Overview...........................................................................................................19
3.2 SW-DP.....................................................................................................................................19
3.3 ETM.........................................................................................................................................19
3.4 Pin functions............................................................................................................................20
3.5 Peripheral Functions in Halt Mode.........................................................................................21
3.6 Connection with a Debug Tool...............................................................................................21
4.1 Memory Map...........................................................................................................................23
4.2 SFR area detail........................................................................................................................25
1.4.1
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
4.1.1
Sorted by pin.......................................................................................................................................................................6
Number of Interrupt Inputs...............................................................................................................................................16
Number of Priority Level Interrupt Bits...........................................................................................................................16
SysTick..............................................................................................................................................................................16
SYSRESETREQ................................................................................................................................................................16
LOCKUP...........................................................................................................................................................................16
Auxiliary Fault Status register..........................................................................................................................................16
Memory map of the TMPM361F10FG............................................................................................................................24
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