TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 20

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

18. Key-on Wakeup
19. Backup module
20. Analog / Digital Converter (ADC)
xii
18.1 Outline.................................................................................................................................515
18.2 Block Diagram.....................................................................................................................515
18.3 Register in detail..................................................................................................................516
18.4 Key-on Wakeup Operation..................................................................................................524
18.5 Pull-up Function..................................................................................................................525
18.6 KWUP input Detection Timing..........................................................................................527
19.1 Features................................................................................................................................529
19.2 Block Diagram.....................................................................................................................529
19.3 BACKUP Mode Operation.................................................................................................530
20.1 Outline.................................................................................................................................535
20.2 Configuration.......................................................................................................................536
20.3 Registers..............................................................................................................................537
18.3.1
18.3.2
18.3.3
18.3.4
18.3.5
18.3.6
18.3.7
18.3.8
18.3.9
18.5.1
18.5.2
19.3.1
20.3.1
20.3.2
20.3.3
20.3.4
20.3.5
20.3.6
20.3.7
20.3.8
20.3.9
20.3.10
20.3.11
20.3.12
20.3.13
20.3.14
20.3.15
20.3.16
20.3.17
17.5.3.2
17.5.3.3
17.5.3.4
19.3.1.1
19.3.1.2
19.3.1.3
19.3.1.4
Register list....................................................................................................................................................................516
KWUPCR0 (Control register 0)....................................................................................................................................516
KWUPCR1 (Control register 1)....................................................................................................................................517
KWUPCR2 (Control register 2)....................................................................................................................................518
KWUPCR3 (Control register 3)....................................................................................................................................519
KWUPPKEY (Port monitor register)...........................................................................................................................520
KWUPCNT (Pull-up cycle register).............................................................................................................................521
KWUPCLR (All interrupt request clear register).........................................................................................................522
KWUPINT (Interrupt monitor register)........................................................................................................................523
In case of using KWUP inputs with pull-up enabled...................................................................................................525
In case of using KWUP inputs with pull-up disabled..................................................................................................526
Operable peripherals in the BACKUP mode................................................................................................................530
Register list....................................................................................................................................................................537
ADCBAS (Conversion Accuracy Setting Register).....................................................................................................538
ADCLK (Conversion Clock Setting Register).............................................................................................................539
ADMOD0 (Mode Control Register 0)..........................................................................................................................541
ADMOD1 (Mode Control Register 1)..........................................................................................................................542
ADMOD2 (Mode Control Register 2) .........................................................................................................................543
ADMOD3 (Mode Control Register 3)..........................................................................................................................545
ADMOD4 (Mode Control Register 4) .........................................................................................................................546
ADMOD5 (Mode Control Register 5)..........................................................................................................................547
ADREG08 (Conversion Result Register 08)..............................................................................................................548
ADREG19 (AD Conversion Result Register 19).......................................................................................................549
ADREG2A (AD Conversion Result Register 2A).....................................................................................................550
ADREG3B (AD Conversion Result Register 3B)......................................................................................................551
ADREG4C (AD Conversion Result Register 4C)......................................................................................................552
ADREG5D (AD Conversion Result Register 5D).....................................................................................................553
ADREG6E (AD Conversion Result Register 6E)......................................................................................................554
ADREG7F (AD Conversion Result Register 7F).......................................................................................................555
Enabling control
Watchdog timer clearing control
Detection time of watchdog timer
Transition to the BACKUP mode
Backup Transition Flow
Transition Flowchart
BACKUP Mode Timing Chart