TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 454

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

14.6
Data Transfer Procedure in the I2C Bus ModeI2C
14.6.3.2
INTSBIx interrupt
if TRX = 0
Then go to other processing.
if AL = 0
Then go to other processing.
if AAS = 0
Then go to other processing.
SBIxCR1
SBIxDBR
rupt request is generated, <PIN> is cleared to "0", and the SCL pin is pulled to the "Low" level.
ter a period of t
is carried out.
in the slave receiver mode.
In the slave mode, the SBI generates the INTSBIx interrupt request on four occasions:
1) when the SBI has received any slave address from the master.
2) when the SBI has received a general-call address.
3) when the received slave address matches its address.
4) when a data transfer has been completed in response to a general-call.
Also, if the SBI detects Arbitration Lost in the master mode, it switches to the slave mode.
Upon the completion of data word transfer in which Arbitration Lost is detected, the INTSBIx inter-
When data is written to or read from SBIxDBR or when <PIN> is set to "1", the SCLx pin is released af-
In the slave mode, the normal slave mode processing or the processing as a result of Arbitration Lost
SBIxSR<AL>, <TRX>, <AAS> and <AD0> are tested to determine the processing required.
"Table 14-2 Processing in Slave Mode"shows the slave mode states and required processing.
Example: When the received slave address matches the SBI's own address and the direction bit is "1"
Note:X; Don’t care
Slave mode (<MST> = "0")
←
←
X
X
LOW
X
X
.
X
X
1
X
0
0
X
X
X
X
Page 430
X
X
Sets the number of bits to be transmitted.
Sets the transmit data.
TMPM361F10FG