TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 488

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

15.3
Registers
7-5
4
3-0
Bit
−
CECBRD
CECFREE[3:0]
Bit Symbol
Note:<CECDTRS> must be used under the same setting as CECRCR1<CECLNC>.
R
R/W
R/W
Type
Read as 0.
Broadcast transmission
0: Not broadcast transmission
1: Broadcast transmission
Set this bit to "1" when transmitting a broadcast message.
Time of bus to be free
0000: 1bit cycle
0001: 2bit cycle
0010: 3bit cycle
0011: 4bit cycle
0100: 5bit cycle
0101: 6bit cycle
0110: 7bit cycle
0111: 8bit cycle
Specifies time of a bus to be free that checked before transmission.
Start transmission after checking the CEC line kept inactive during the specified cycles.
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Function
1000: 9bit cycle
1001: 10bit cycle
1010: 11bit cycle
1011: 12bit cycle
1100: 13bit cycle
1101: 14bit cycle
1110: 15bit cycle
1111: 16bit cycle
TMPM361F10FG