TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 369

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

Table 12-5 Clock resolution to the Baud Rate Generator fc = 48 MHz, fs = 32.768kHz
φT0 selection
CGSYSCR
<FPSEL1>
0
1
Note 1: The prescaler output clock φTn must be selected so that the relationship "φTn ≤ fsys/2" is satis-
Note 2: Do not change the clock gear while SIO is operating.
Note 3: The "−" indicates that the setting is prohibited and the "*" indicates don’t care in the above table.
clock selection
CGSYSCR
<FPSEL0>
Peripheral
1 (fc)
*
fied (so that φTn is slower than fsys).
<GEAR[2:0]>
CGSYSCR
Clock gear
100 (fc/2)
101 (fc/4)
110 (fc/8)
000 (fc)
value
*
Prescaler clock se-
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
100 (fperiph/16)
101 (fperiph/32)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
000 (fperiph/1)
001 (fperiph/2)
010 (fperiph/4)
011 (fperiph/8)
<PRCK[2:0]>
CGSYSCR
lection
*
Page 345
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2 (61μs)
1
2
2
3
4
5
3
4
5
3
4
5
4
5
6
6
6
6
(0.0417 μs)
(0.0833 μs)
(0.0833 μs)
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.333 μs)
(0.667 μs)
φT1
(1.33 μs)
(1.33 μs)
(1.33 μs)
(1.33 μs)
−
−
−
−
−
−
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2
Prescaler output clock resolution
3
4
5
3
4
5
3
4
5
4
5
6
7
8
6
7
8
6
7
8
6
7
8
3
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.167 μs)
(0.333 μs)
(0.667 μs)
(0.333 μs)
(0.667 μs)
φT4
(1.33 μs)
(2.67 μs)
(5.33 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(244 μs)
−
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2
5
5
5
5
10
10
10
10
6
7
8
9
6
7
8
9
6
7
8
9
6
7
8
9
5
φT16
(0.667 μs)
(0.667 μs)
(0.667 μs)
(0.667 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(1.33 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(21.3 μs)
(21.3 μs)
(21.3 μs)
(21.3 μs)
(977 μs)
TMPM361F10FG
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fs/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
10
11
12
10
11
12
10
11
12
10
11
12
7
7
8
9
7
8
9
7
8
9
7
8
9
φT64
(3.91 ms)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(2.67 μs)
(5.33 μs)
(10.7 μs)
(21.3 μs)
(42.7 μs)
(85.3 μs)
(21.3 μs)
(42.7 μs)
(85.3 μs)
(21.3 μs)
(42.7 μs)
(85.3 μs)
(21.3 μs)
(42.7 μs)
(85.3 μs)