TMPM361F10FG Toshiba, TMPM361F10FG Datasheet - Page 637

• Manufacturer Part Number: TMPM361F10FG
• Manufacturer: Toshiba

Specifications of TMPM361F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Contact Us
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14Ã?14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 3
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

22.2.10.2
22.2.10.3
See Table 22-7 for the transfer format of this command.
See Table 22-8 for the transfer format of this command.
Show Flash Memory SUM Command
Show Product Information Command
15. If the (m+2) th byte was a normal acknowledge response, a branch is made to the address speci-
1. The processing of the 1st and 2nd bytes are the same as for the RAM Transfer command.
2. The 3rd byte, which the target board receives from the controller, is a command. The code for
3. The 4th byte, transmitted from the target board to the controller, is an acknowledge response
4. The Show Flash Memory Sum routine adds all the bytes of the flash memory together. The
5. The 7th byte is a checksum value for the 5th and 6th bytes. To calculate the checksum value,
6. The 8th byte is the next command code.
1. The processing of the 1st and 2nd bytes are the same as for the RAM Transfer command.
2. The 3rd byte, which the target board receives from the controller, is a command. The code for
3. The 4th byte, transmitted from the target board to the controller, is an acknowledge response
fied by the 19th to 22nd bytes.
the Show Flash Memory Sum command is 0x20.
to the 3rd byte. Before sending back the acknowledge response, the boot program checks for a
receive error. If there is a receive error, the boot program transmits 0xX8 (bit 3) and returns to
the command wait state again. In this case, the upper four bits of the acknowledge response
are undefined- they hold the same values as the upper four bits of the previously issued com-
mand. When the SIO4 is configured for I/O Interface mode, the boot program does not check
for a receive error.
echoes it back to the controller. When the Show Flash Memory Sum command is received,
the boot program echoes back a value of 0x20 and then branches to the Show Flash Memory
Sum routine. If the 3rd byte is not a valid command, the boot program sends back 0xX1 (bit
0) to the controller and returns to the command wait state (the third byte) again. In this case,
the upper four bits of the acknowledge response are undefined - they hold the same values as
the upper four bits of the previously issued command.
5th and 6th bytes, transmitted from the target board to the controller, indicate the upper and low-
er bytes of this total sum, respectively. For details on sum calculation, see Section "22.2.10.8 Cal-
culation of the Show Flash Memory Sum Command".
add the 5th and 6th bytes together, ignore the carry and calculate the 8-bit two’s complement
by using lower 8 bits then transmit this checksum value from the controller.
the Show Product Information command is 0x30.
to the 3rd byte. Before sending back the acknowledge response, the boot program checks for a
receive error. If there is a receive error, the boot program transmits 0xX8 (bit 3) and returns to
If the 3rd byte is equal to any of the command codes listed in Table 22-4, the boot program
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