DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 182

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Section 6 Bus Controller (BSC)
Bit
1
0
6.4
6.4.1
The external address space bus specifications consist of three elements: Bus width, the number of
access states, and the wait mode and the number of program wait states. The bus width and the
number of access states for on-chip memory and internal I/O registers are fixed, and are not
affected by the bus controller settings.
Bus Width: A bus width of 8 or 16 bits can be selected via the ABW bit in WSCR.
Number of Access States: Two or three access states can be selected via the AST bit in WSCR.
When the 2-state access space is designated, wait-state insertion is disabled.
In the burst ROM interface, the number of access states is determined regardless of the AST bit
setting.
Wait Mode and Number of Program Wait States: When a 3-state access space is designated by
the AST bit in WSCR, the wait mode and the number of program wait states to be inserted
automatically is selected by the WMS1, WMS0, WC1, and WC0 bits in WSCR. From 0 to 3
program wait states can be selected.
Rev. 3.00 Mar 21, 2006 page 126 of 788
REJ09B0300-0300
Bit Name
WC1
WC0
Bus Control
Bus Specifications
Initial Value
1
1
R/W
R/W
R/W
Description
Wait Count 1, 0
Select the number of program wait states to be
inserted when the external address space is accessed
while the AST bit is set to 1.
00: Program wait state is not inserted
01: 1 program wait state is inserted
10: 2 program wait states are inserted
11: 3 program wait states are inserted