DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 343

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

This LSI has an on-chip 8-bit timer module (TMR_0 and TMR_1) with two channels operating on
the basis of an 8-bit counter. The 8-bit timer module can count external events, and can also be
used as a multifunction timer in a variety of applications, such as generation of counter reset,
interrupt requests, and pulse output with an arbitrary duty cycle using a compare-match signal
with two registers.
This LSI also has a similar on-chip 8-bit timer module (TMR_Y and TMR_X) with two channels,
which can be used through connection to the timer connection.
12.1
TIMH261A_010020020700
Selection of clock sources
Selection of three ways to clear the counters
Timer output controlled by two compare-match signals
Cascading of TMR_0 and TMR_1
Multiple interrupt sources for each channel
TMR_0, TMR_1: The counter input clock can be selected from six internal clocks and an
external clock
TMR_Y, TMR_X: The counter input clock can be selected from three internal clocks and
an external clock
The counters can be cleared on compare-match A or compare-match B, or by an external
reset signal.
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of
pulse output or PWM output with an arbitrary duty cycle. (The TMR_Y does not have a
timer output pin.)
(TMR_Y and TMR_X cannot be cascaded.)
Operation as a 16-bit timer can be performed using TMR_0 as the upper half and TMR_1
as the lower half (16-bit count mode).
TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count
mode).
TMR_0, TMR_1, and TMR_Y: Three types of interrupts: Compare-match A, compare-
match B, and overflow
TMR_X: Input capture
Features
Section 12 8-Bit Timer (TMR)
Rev. 3.00 Mar 21, 2006 page 287 of 788
Section 12 8-Bit Timer (TMR)
REJ09B0300-0300