DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 299

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

This LSI has an on-chip 14-bit pulse-width modulator (PWM) timer with two output channels. It
can be connected to an external low-pass filter to operate as a 14-bit D/A converter.
10.1
Figure 10.1 shows a block diagram of the PWM (D/A) module.
PWM1411A_010020020700
Division of pulse into multiple base cycles to reduce ripple
Two resolution settings
The resolution can be set equal to one or two system clock cycles.
Two base cycle settings
The base cycle can be set equal to T
Four operating speeds
Four operation clocks (by combination of two resolution settings and two base cycle settings)
PWX0
PWX1
Features
Section 10 14-Bit PWM Timer (PWMX)
Legend:
DACR
DADRA
DADRB
DACNT
Select clock
Control
logic
: PWM D/A control register
: PWM D/A data register A
: PWM D/A data register B
: PWM D/A counter
Figure 10.1 PWM (D/A) Block Diagram
Internal clock
Base cycle compare match A
Fine–adjustment pulse addition
Base cycle compare match B
Fine–adjustment pulse addition
Base cycle overflow
/2
Clock
64 or T
Comparator A
Comparator B
256, where T is the resolution.
DACNT
DACR
Rev. 3.00 Mar 21, 2006 page 243 of 788
Section 10 14-Bit PWM Timer (PWMX)
DADRA
DADRB
Internal data bus
Module data bus
Bus interface
REJ09B0300-0300