DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 183

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Table 6.2 shows the bus specifications for the basic bus interface of each area.
Table 6.2
Note:
6.4.2
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM enable extended mode, the address space other than on-chip ROM, on-chip RAM,
internal I/O registers, and their reserved areas is specified as the external address space. The on-
chip RAM and its reserved area are enabled when the RAME bit in SYSCR is set to 1. The on-
chip RAM and its reserved area are disabled and corresponding addresses are the external address
space when the RAME bit is cleared to 0.
6.4.3
The external address space is initialized as the basic bus interface and a 3-state access space. In
on-chip ROM disable extended mode, the address space other than on-chip RAM and internal I/O
registers is specified as the external address space. In on-chip ROM enable extended mode, the
address space other than on-chip ROM, on-chip RAM, internal I/O registers, and their reserved
areas is specified as the external address space. The on-chip RAM area is enabled when the
ABW
0
1
* Other than WMS1 = 0 and WMS0 = 1
AST
0
1
0
1
Advanced Mode
Normal Mode
Bus Specifications for Basic Bus Interface
WMS1
—
0
—*
—
0
—*
—
1
—*
—
1
—*
WMS0
WC1
—
—
0
1
—
—
0
1
WC0
—
—
0
1
0
1
—
—
0
1
0
1
Bus Width
16
16
8
8
Rev. 3.00 Mar 21, 2006 page 127 of 788
Section 6 Bus Controller (BSC)
Bus Specifications
Number of
Access
States
2
3
3
2
3
3
REJ09B0300-0300
Number of
Program
Wait States
0
0
0
1
2
3
0
0
0
1
2
3