DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 574

IC H8S MCU FLASH 128K 100-QFP

DF2148BTE20

Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 18 Host Interface X-Bus Interface (XBS)
18.3.5
STR indicates status information during host interface processing.
Bit
7 to 4 DBU
3
2
1
0
Note:
Rev. 3.00 Mar 21, 2006 page 518 of 788
REJ09B0300-0300
Bit Name
C/D
DBU
IBF
OBF
* Only 0 can be written, to clear the flag.
Status Register (STR)
Initial
Value
All 0
0
0
0
0
Slave
R/W
R
R/W
R
R/(W) *
R/W
R
R
Host
R
R
R
The user can use these bits as necessary.
Command/Data
Receives the HA0 input when the host processor
writes to IDR, and indicates whether IDR
contains data or a command.
0: Contents of input data register (IDR) are data
1: Contents of input data register (IDR) are a
The user can use these bits as necessary.
This bit is an internal interrupt source to the slave
processor (this LSI).
The IBF flag setting and clearing conditions are
different when the fast A20 gate is used. For
details see table 18.5.
[Clearing Condition]
0: When the slave processor reads IDR
[Setting Condition]
1: When the host processor writes to IDR
Output Buffer Full
[Clearing Condition]
0: When the host processor reads ODR or the
[Setting Condition]
1: When the slave processor writes to ODR
Description
Defined by User
Defined by User
Input Buffer Full
command
slave writes 0 in the OBF bit

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