DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 834

IC H8S MCU FLASH 128K 100-QFP

DF2148BTE20

Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Appendix A I/O Port States in Each Processing State
Port Name
Pin Name
Port 96
EXCL
Ports 95 to 93
AS, HWR, RD
Ports 92, 91
Port 90
LWR
Port A
A23 to A16
Port B
D7 to D0
Ports C to G
(H8S/2160B,
H8S/2161B)
Legend:
H:
L:
T:
kept:
DDR: Data direction register
Note:
Rev. 3.00 Mar 21, 2006 page 778 of 788
REJ09B0300-0300
High
Low
High-impedance state
Input ports are in the high-impedance state (when DDR = 0 and PCR = 1, input pull-up
MOSs remain on).
Output ports maintain their previous state.
Depending on the pins, the on-chip peripheral modules may be initialized and the I/O port
function determined by DDR and DR used.
* In the case of address output, the last address accessed is retained.
MCU Operating
Mode
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
1
2, 3 (EXPE = 1)
2, 3 (EXPE = 0)
Reset
Clock
output
T
H
T
T
T
T
T
T
Hardware
Standby
Mode
T
T
T
T
T
T
T
Software
Standby
Mode
[DDR = 1] H
[DDR = 0] T
H
kept
kept
H/kept
kept
kept *
T/kept
kept
kept
Watch
Mode
EXCL
input
H
kept
kept
H/kept
kept
kept *
T/kept
kept
kept
Sleep
Mode
[DDR = 1]
clock
output
[DDR = 0] T
H
kept
kept
H/kept
kept
kept *
T/kept
kept
kept
Sub-
sleep
Mode
EXCL
input
H
kept
kept
H/kept
kept
kept *
T/kept
kept
kept
Subactive
Mode
EXCL input
AS, HWR,
RD
I/O port
I/O port
LWR/
I/O port
I/O port
I/O port
A23 to A16/
I/O port
I/O port
D7 to D0/
I/O port
I/O port
I/O port
Program
Execution
State
Clock output/
EXCL input/
input port
AS, HWR,
RD
I/O port
I/O port
LWR/
I/O port
I/O port
I/O port
A23 to A16/
I/O port
I/O port
D7 to D0/
I/O port
I/O port
I/O port

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