DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 436

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Section 15 Serial Communication Interface (SCI and IrDA)
15.4.4
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as shown in figure 15.5. When the operating mode, transfer format, etc., is
changed, the TE and RE bits must be cleared to 0 before making the change using the following
procedure. When the TE bit is cleared to 0, the TDRE flag in SSR is set to 1. Note that clearing
the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and ORER flags in SSR,
or the contents of RDR. When an external clock is used in asynchronous mode, the clock must be
supplied even during initialization.
Rev. 3.00 Mar 21, 2006 page 380 of 788
REJ09B0300-0300
SCI Initialization (Asynchronous Mode)
Set data transfer/receive format in
SCR to 1, and set RIE, TIE, TEIE,
Clear TE and RE bits in SCR to 0
Set CKE1 and CKE0 bits in SCR
<Initialization completion>
(TE and RE bits are 0)
1-bit interval elapsed?
Set TE and RE bits in
Set value in BRR
Start initialization
SMR and SCMR
and MPIE bits
Figure 15.5 Sample SCI Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1] Set the clock selection in SCR.
[2] Set the data transfer/receive format
[3] Write a value corresponding to the
[4] Wait at least one bit interval, then
Be sure to clear bits RIE, TIE,
TEIE, and MPIE, and bits TE and
RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
in SMR and SCMR.
bit rate to BRR. Not necessary if
an external clock is used.
set the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and
MPIE bits.
Setting the TE and RE bits enables
the TxD and RxD pins to be used.