DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 630

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Section 19 Host Interface LPC Interface (LPC)
clock must first be issued to the host. For details see section 19.4.6, Host Interface Clock Start
Request (CLKRUN).
19.4.6
A request to restart the clock (LCLK) can be sent to the host processor by means of the CLKRUN
pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested
since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host
interrupt request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is
sent to the host. The timing for this operation is shown in figure 19.7.
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
Rev. 3.00 Mar 21, 2006 page 574 of 788
REJ09B0300-0300
CLK
CLKRUN
Host Interface Clock Start Request (CLKRUN)
Pull-up enable
Drive by the slave processor
Figure 19.7 Clock Start Request Timing
1
2
Drive by the host processor
3
4
5
6