DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 441

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

No
No
Read receive data in RDR, and
clear RDRF flag in SSR to 0
PER ∨ FER ∨ ORER = 1
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read ORER, PER, and
All data received?
FER flags in SSR
Start reception
Figure 15.9 Sample Serial Reception Flowchart (1)
Initialization
RDRF = 1
<End>
Yes
Yes
No
(Continued on next page)
Error processing
Section 15 Serial Communication Interface (SCI and IrDA)
Yes
[1]
[2]
[4]
[5]
[3]
[1] SCI initialization:
[2] [3] Receive error processing and break
[4] SCI status check and receive data read:
[5] Serial reception continuation procedure:
Legend:
∨
: Logical OR
Rev. 3.00 Mar 21, 2006 page 385 of 788
The RxD pin is automatically
designated as the receive data input
pin.
detection:
If a receive error occurs, read the
ORER, PER, and FER flags in SSR to
identify the error. After performing the
appropriate error processing, ensure
that the ORER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
Read SSR and check that RDRF = 1,
then read the receive data in RDR and
clear the RDRF flag to 0. Transition of
the RDRF flag from 0 to 1 can also be
identified by an RXI interrupt.
To continue serial reception, before the
stop bit for the current frame is
received, read the RDRF flag, read
RDR, and clear the RDRF flag to 0.
However, the RDRF flag is cleared
automatically when the DTC is initiated
by an RXI interrupt and reads data from
RDR.
REJ09B0300-0300