DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 40

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Section 1 Overview
Figure 1.1
Figure 1.2
Figure 1.3
Figure 1.4
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.2
Figure 3.3
Figure 3.4
Figure 3.5
Figure 3.6
Figure 3.7
Figure 3.8
Figure 3.9
Figure 3.10
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Rev. 3.00 Mar 21, 2006 page xxxviii of liv
Internal Block Diagram of H8S/2140B, H8S/2141B, H8S/2145B,
and H8S/2148B....................................................................................................
Internal Block Diagram of H8S/2160B and H8S/2161B .....................................
Pin Arrangement of H8S/2140B, H8S/2141B, H8S/2145B, and H8S/2148B .....
Pin Arrangement of H8S/2160B and H8S/2161B................................................
Exception Vector Table (Normal Mode) ............................................................. 29
Stack Structure in Normal Mode ......................................................................... 29
Exception Vector Table (Advanced Mode) ......................................................... 30
Stack Structure in Advanced Mode ..................................................................... 31
Memory Map ....................................................................................................... 32
CPU Internal Registers......................................................................................... 33
Usage of General Registers.................................................................................. 34
Stack .................................................................................................................... 35
General Register Data Formats (1) ...................................................................... 37
General Register Data Formats (2) ...................................................................... 38
Memory Data Formats ......................................................................................... 39
Instruction Formats (Examples)........................................................................... 51
Branch Address Specification in Memory Indirect Addressing Mode ................ 54
State Transitions................................................................................................... 58
Address Map for H8S/2140B and H8S/2160B (1)............................................... 71
Address Map for H8S/2140B and H8S/2160B (2)............................................... 72
Address Map for H8S/2141B and H8S/2161B (1)............................................... 73
Address Map for H8S/2141B and H8S/2161B (2)............................................... 74
Address Map for H8S/2145BV (1) ...................................................................... 75
Address Map for H8S/2145BV (2) ...................................................................... 76
Address Map for H8S/2145B (1) ......................................................................... 77
Address Map for H8S/2145B (2) ......................................................................... 78
Address Map for H8S/2148B (1) ......................................................................... 79
Address Map for H8S/2148B (2) ......................................................................... 80
Reset Sequence (Mode 3) .................................................................................... 84
Stack Status after Exception Handling................................................................. 86
Figures
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