DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 534

IC H8S MCU FLASH 128K 100-QFP

DF2148BTE20

Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 16 I
Table 16.11 I
Item
t
t
t
t
t
t
t
(master)
t
(slave)
t
Notes: 1. Does not meet the I
Rev. 3.00 Mar 21, 2006 page 478 of 788
REJ09B0300-0300
SCLHO
SCLLO
BUFO
STAHO
STASO
STOSO
SDASO
SDASO
SDAHO
2. Value when the IICX bit is set to 1. When the IICX bit is cleared to 0, the value is
3. Calculated using the I
t
Indication
0.5 t
0.5 t
0.5 t
(–t
0.5 t
(–t
1 t
0.5 t
(–t
1 t
(–t
1 t
–12 t
(–t
3 t
cyc
SCLO
SCLLO
SCLL
cyc
Sr
Sf
Sr
Sr
Sr
is necessary: (a) secure a start/stop condition issuance interval; (b) adjust the rise and
fall times by means of a pull-up resistor and capacitive load; (c) reduce the transfer rate;
(d) select slave devices whose input timing permits this output timing.
The values in the above table will vary depending on the settings of the IICX bit and bits
CKS0 to CKS2. Depending on the frequency it may not be possible to achieve the
maximum transfer rate; therefore, whether or not the I
met must be determined in accordance with the actual setting conditions.
(t
speed mode: 1300 ns min.).
)
)
)
)
)
SCLO
SCLO
SCLO
SCLO
SCLO
SCLL
cyc
2
*
C Bus Interface (IIC) (Optional)
(–t
*
3
2
*
C Bus Timing (with Maximum Influence of t
3
–1 t
–1 t
+ 2 t
2
(–t
(–t
–3 t
– 6t
Sr
)
Sr
Sf
cyc
cyc
)
)
cyc
cyc
cyc
).
Standard mode
High-speed mode –300
Standard mode
High-speed mode –250
Standard mode
High-speed mode –300
Standard mode
High-speed mode –250
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode –300
Standard mode
High-speed mode 0
2
C bus interface specification. Remedial action such as the following
2
C bus specification values (standard mode: 4700 ns min.; high-
t
Influence
(Max.)
–1000
–250
–1000
–250
–1000
–1000
–1000
–1000
0
Sr
/t
Sf
Time Indication (at Maximum Transfer Rate) [ns]
I
Specifi-
cation
(Min.)
4000
600
4700
1300
4700
1300
4000
600
4700
600
4000
600
250
100
250
100
0
0
2
C Bus
5 MHz
4000
950
4750
1000 *
3800 *
750 *
4550
800
9000
2200
4400
1350
3100
400
1300
–1400 *
600
600
=
Sr
1
/t
1
1
2
1
Sf
C bus interface specifications are
8 MHz
4000
950
4750
1000 *
3875 *
825 *
4625
875
9000
2200
4250
1200
3325
625
2200
–500 *
375
375
)
=
1
1
1
1
4000
950
4750
1000 *
3900 *
850 *
4650
900
9000
2200
4200
1150
3400
700
2500
–200 *
300
300
10 MHz
=
1
1
1
1
4000
950
4750
1000 *
3938 *
888 *
4688
938
9000
2200
4125
1075
3513
813
2950
250
188
188
16 MHz
=
1
1
1
4000
950
4750
1000 *
3950 *
900 *
4700
950
9000
2200
4100
1050
3550
850
3100
400
150
150
20 MHz
=
1
1
1

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