DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 609

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

Bit
7
6
5
SIRQCR0
Bit Name Initial Value Slave Host Description
Q/C
SELREQ 0
IEDIR
0
0
R
R/W
R/W
R/W
—
—
—
Quiet/Continuous Mode Flag
Indicates the mode specified by the host at the end
of an SERIRQ transfer cycle (stop frame).
0: Continuous mode
[Clearing conditions]
1: Quiet mode
[Setting condition]
Specification by SERIRQ transfer cycle stop frame.
Start Frame Initiation Request Select
Selects whether start frame initiation is requested
when one or more interrupt requests are cleared, or
when all interrupt requests are cleared, in quiet
mode.
0: Start frame initiation is requested when all
1: Start frame initiation is requested when one or
Interrupt Enable Direct Mode
Specifies whether LPC channel 2 and channel 3
SERIRQ interrupt source (SMI, IRQ6, IRQ9 to
IRQ11) generation is conditional upon OBF, or is
controlled only by the host interrupt enable bit.
0: Host interrupt is requested when host interrupt
1: Host interrupt is requested when host interrupt
interrupt requests are cleared in quiet mode.
more interrupt requests are cleared in quiet mode.
enable bit and corresponding OBF are both set to
1
enable bit is set to 1
LPC hardware reset, LPC software reset
Specification by SERIRQ transfer cycle stop
frame
Section 19 Host Interface LPC Interface (LPC)
Rev. 3.00 Mar 21, 2006 page 553 of 788
REJ09B0300-0300