DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 573

• Manufacturer Part Number: DF2148BTE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148BTE20; HD64F2148BTE20

18.3.3
IDR is a register in which data to be input from the host processor to the slave processor (this LSI)
is stored.
18.3.4
ODR is a register in which data to be output from the slave processor (this LSI) to the host
processor is stored.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
IDR7
IDR6
IDR5
IDR4
IDR3
IDR2
IDR1
IDR0
Bit Name
ODR7
ODR6
ODR5
ODR4
ODR3
ODR2
ODR1
ODR0
Input Data Register (IDR)
Output Data Register 1 (ODR)
Initial
Value
Initial
Value
Slave
R
R
R
R
R
R
R
R
Slave
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Host
W
W
W
W
W
W
W
W
Host
R
R
R
R
R
R
R
R
Section 18 Host Interface X-Bus Interface (XBS)
Description
When CSn (n = 1 to 4) is low, information on the
host data bus is written into IDR_n at the rising
edge of IOW. The HA0 state is also latched into
the C/D bit in STR_n to indicate whether the
written information is a command or data.
Description
The ODR_n contents are output on the host data
bus when HA0 is low, CSn (n = 1 to 4) is low,
and IOR is low.
Rev. 3.00 Mar 21, 2006 page 517 of 788
REJ09B0300-0300