DF2148BTE20 Renesas Electronics America, DF2148BTE20 Datasheet - Page 587

IC H8S MCU FLASH 128K 100-QFP

DF2148BTE20

Manufacturer Part Number
DF2148BTE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148BTE20
HD64F2148BTE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148BTE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.2
Table 19.1 lists the input and output pins of the LPC module.
Table 19.1 Pin Configuration
Name
LPC address/
data 3 to 0
LPC frame
LPC reset
LPC clock
Serialized interrupt
request
LSCI general
output
LSMI general
output
PME general
output
GATE A20
LPC clock run
LPC power-down
Notes: 1. Pin state monitoring input is possible in addition to the LPC interface control
2. Only 0 can be output. If 1 is output, the pin goes to the high-impedance state, so an
Input/Output Pins
input/output function.
external resistor is necessary to pull the signal up to V
Abbreviation
LAD3 to LAD0 P33 to P30 Input/
LFRAME
LRESET
LCLK
SERIRQ
LSCI
LSMI
PME
CLKRUN
LPCPD
GA20
Port
P34
P35
P36
PB1
PB0
P80
P82
P83
P37
P81
I/O
output
Input *
Input *
Input
Input/
output *
Output *
Output *
Output *
Output *
Input/
output *
Input *
Section 19 Host Interface LPC Interface (LPC)
1
1
1
1
1
1
1
1
1
*
Rev. 3.00 Mar 21, 2006 page 531 of 788
*
*
*
*
2
2
2
2
2
Function
Serial (4-signal-line) transfer cycle
type/address/data signals,
synchronized with LCLK
Transfer cycle start and forced
termination signal
LPC interface reset signal
33 MHz PCI clock signal
Serialized host interrupt request
signal, synchronized with LCLK
(SMI, IRQ1, IRQ6, IRQ9 to IRQ12)
General output
General output
General output
A20 gate control signal output
LCLK restart request signal in case
of serial host interrupt request
LPC module shutdown signal
CC
.
REJ09B0300-0300

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