TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 111

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Note: After reset release, only the control register of the block address area 2 is valid. The control register
CS area
3.6.3
CS2 to CS3
CS0
CS1
of block address area 2 has the <B2M> bit. If the <B2M> bit is set to “0”, block address area 2 is set
to addresses 000000H to FFFFFFH. (This is the state following reset release .) If the <B2M> bit is
set to “1”, the start address and the address area size are set, as in the other block address areas.
Size (bytes)
Basic Functions and Register Setting
the number of waits out of the memory controller’s functions.
(1) Block address area specification
This section describes the setting of the block address area, the connecting memory and
address areas. The memory controller compares the register value and the address
every bus cycle. The address bit which is masked by the memory address mask register
(MAMRn) is not compared by the memory controller. The block address area size is
determined by setting the memory address mask register. The value that is set to the
register is compared with the block address area on the bus. If the result is a match,
the memory controller sets the chip select signal (CSn) to “low”.
(i) Memory start address register setting
(ii) Memory address mask register setting
The block address area is specified by two registers.
The memory start address register (MSARn) sets the start address of the block
256
addresses A23 to A16 respectively. The lower start addresses A15 to A0 are always
set to address 0000H.
of addresses 000000H to FF0000H.
compared or not. In register setting, “0” is “compare”, and “1” is “do not compare”.
by the result of the comparison.
The MS23 to MS 16 bits of the memory start address register correspond with
Therefore the start addresses of the block address area are set to all 64 Kbytes
The memory address mask register determines whether an address bit is
The address bits that can be set depends on the block address area.
The upper bits are always compared. The block address area size is determined
The size to be set depending on the block address area is as follows.
Block address area 0: A20 to A8
Block address area 1: A21 to A8
Block address area 2 to 3: A22 to A15
512
32 K
64 K
92CH21-109
128 K 256 K 512 K
1 M
2 M
4 M
TMP92CH21
2009-06-19
8 M

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