TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 372

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
3.14.5.3 Program sample (4K color TFT)
; ********PORT settings *********
; ********LCD settings*********
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
(PACR), 78h
(PLFC), 0ffh
(PLCR), 0f0h
(PKFC), 0bh
(PCCR), 0c0h
(PCFC), 0c0h
(LCDSCC), 100
(LCDCCR0), 00h
(LCDCCR1), 00h
(LCDCCR2), 00h
(LCDSIZE), 74h
(LCDFFP), 49h
(LCDMODE0), 059h
(LCDMODE1), 01h
(LCDCTL0), 02h
(LCDCTL1), 00h
(LSARCL), 00h
(LSARCM), 00h
(LSARCH), 40h
(LSARAL), 00h
(LSARAM), 00h
(LSARAH), 00h
(LSARBL), 00h
(LSARBM), 00h
(LSARBH), 00h
(CMNAL), 00h
(CMNAH), 00h
(CMNBL), 00h
(CMNBH), 00h
(LCDCTL0), 03h
; LD11-LD8 set
; LD7-LD0 set
;
;
;
;
; Counter set (refresh rate:50Hz at fc = 40MHz)
;
;
;
; 320 com × 256 seg
; 320 com
; SRAM, TFT 4096 color
;
;
;
; C area (enable)
;
;
; A area (disable)
;
;
; B area (disable)
;
;
; A area Row number
; B area Row number
;
; START (FP bit8 = 1)
Output mode
LBCD, LLP, LCP0
PC6: LDIV (for TFT) PC7: LCP1
PC6: LDIV
Invalid 8bit A type
(FP bit8=1)
SCP0,SCP1:negedge, BCD:↓
92CH21-370
TMP92CH21
2009-06-19

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