TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 72

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

P2FC2
(0009H)
P2DR
(0082H)
P2FC
(000BH)
P2
(0008H)
P2CR
(000AH)
Bit symbol
Read/Write
Reset State
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Note 2
Function
Bit symbol
Read/Write
Reset State
Function
Bit symbol
Read/Write
Reset State
Function
Note 1: Read-modify-write instruction is prohibited for P2CR, P2FC and P2FC2.
Note 2: It is set to “Port” or “Data bus” by AM pin setting.
P27F2
P27C
P27D
P27
7
7
7
7
7
0
0
1
P26F2
P26C
P26D
P26
6
6
6
6
6
0
0
1
Figure 3.5.4 Register for Port 2
Data from external port (Output latch register is cleared to “0”)
Port 2 Function register 2
Port 2 Function register
Port 2 Control register
Input/Output buffer drive register for standby mode
Port 2 Drive register
P25F2
P25C
P25D
P25
5
5
0
5
5
0
5
1
Port 2 register
92CH21-70
0: CMOS output 1: Open-drain output
P24F2
P24C
P24D
0: Input 1: Output
P24
4
4
4
4
4
0
0
1
R/W
W
W
W
P23F2
P23C
P23D
P23
3
3
3
3
3
0
0
1
P22F2
P22C
P22D
P22
2
2
2
2
0
2
0
1
P21F2
P21C
P21D
P21
1
1
1
1
0
1
0
1
TMP92CH21
2009-06-19
0: Port
1: Data bus
(D16to D23)
P20F2
P20C
P20D
P20
P2F
0/1
0
0
0
W
0
0
0
1
0