TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 173

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

SC0MOD0
(1202H)
3.9.3
Bit symbol
Read/Write
Reset State
Function
SFR
Figure 3.9.7 Serial Mode Control Register (Channel 0, SC0MOD0)
Transfer
data bit8
TB8
7
0
Hand
shake
0: CTS
1: CTS
disable
enable
CTSE
6
0
0: Receive
1: Receive
Receive
function
disable
enable
RXE
92CH21-171
5
0
Wakeup
function
0: Disable
1: Enable
WU
4
0
R/W
Serial transmission mode
00: I/O interface mode
10: 8-bit UART mode
11: 9-bit UART mode
01: 7-bit UART mode
SM1
3
0
Note: The clock selection for the I/O
Serial transmission clock source (UART)
Serial transmission mode
Wakeup function
Receiving function
Handshake function (
Transmission data bit8
00 TMRA0 match detect signal
01 Baud rate generator
10 Internal clock f
11 External clock (SCLK0 input)
00 I/O interface mode
01
10
11
0
1
0
1
0
1
9-bit UART
Interrupt generated
when data is received
Interrupt generated
only when
SC0CR<RB8> = 1
Receive disabled
Receive enabled
UART mode
Disabled (always transferable)
Enabled
interface mode is controlled by the
serial control register (SC0CR).
SM0
2
0
IO
Serial transmission clock
00: TMRA0 trigger
01: Baud rate generator
10: Internal clock f
11: External clock
(UART)
CTS
7-bit mode
8-bit mode
9-bit mode
SC1
(SCLK0 input)
1
0
pin)
Other modes
Don’t care
TMP92CH21
2009-06-19
SC0
IO
0
0