TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 364

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

(Support to DVM setting)
Horizontal Front Porch
(LCDCCR0)
(Counter LCP1: 3-bit)
This example shows register
value “0”.
(Low Enable setting)
3.14.4.5 Setting Each Control Signals
LLP (Mode1)
LLP (Mode2)
LD11 to LD0
(Rise up)
(Rise up)
load pulse (LLP). Special data bus LD11 to LD0 uses 8 bits or 12 bits for suitable LCD
driver.
bus and high speed transmission, some noise may be generated. This LSI has an LDIV
function. This function automatically sets the minimum data change method, from
inverting data and LDIV signal, to comparing current data with the previous data. If
the TFT LCD driver supports the data inverting function, it is possible to decrease the
noise.
LBCD
LFR
LCP1
LCP0
LLP
The TFT source driver is controlled by base clock (LCP0), data start clock (LFR) and
The timing of each signal can be finely adjusted using the relevant control register.
When using the TFT driver a large amount of data is required. So, when using wide
The following shows basic timings.
Figure 3.14.17 Timing Diagram of TFT Driver Control
1
1 2 3 4 5 6 7 8 9
2
3
4
Horizontal Front Porch (LCDCCR1)
(f
This example shows register value “0”
Offset time is fsys(14 to 16
SYS
92CH21-362
5
: 8 clocks × 5-bit counter)
6
7
SEG
8
High Width Control(LCDCCR2)
(f
When register is set “0”, high level
width is out when LD bus data is valid.
SYS
9
: 8 clocks × 8-bit counter)
COM
.
Horizontal Back Porch
(No control counter)
Vertical Back Porch
(No control counter)
Gate driver
control
TMP92CH21
2009-06-19
Source
driver control