TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 476

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

No.
4.3.3
10 Access time from clock (CL* =2)
11 Output data hold time
12 Data in setup time
13 Data in hold time
14 Address setup time
15 Address hold time
16 CKE setup time
17 Command setup time
18 Command hold time
19 Mode register set cycle time
1 Ref/active to ref/active command period
2 Active to precharge command period
3 Active to read/write command delay
4 Precharge to active command period
5 Active to active command period
6 Write recovery time (CL* = 2)
7 Clock cycle time (CL* = 2)
8 Clock high level width
9 Clock low level width
CL*
AC measuring conditions
time
• Output level: High = 0.7 VCC, Low = 0.3 VCC, C
• Input level: High = 0.9 VCC, Low = 0.1 VCC
:
CAS latency.
SDRAM Controller AC Characteristics
Parameter
Symbol
t
t
t
t
t
t
t
t
RCD
RRD
t
CMS
CMH
t
RAS
t
t
t
t
t
t
t
t
CKS
RSC
t
WR
OH
RC
RP
CK
CH
AC
DS
DH
AS
AH
CL
92CH21-474
L
= 50 pF
0.75T − 30
0.5T − 15
0.5T − 15
0.25T − 9
0.5T − 15
0.5T − 15
0.5T − 15
T − 35
T − 5
Min
2T
2T
3T
T
T
T
T
0
T
Variable
12210
T − 30
Max
40 MHz 36 MHz 27 MHz
100
100
150
7.5
3.5
50
50
50
50
10
10
20
15
45
10
10
10
50
0
166.5
55.5
55.5
55.5
55.5
12.7
12.7
25.5
20.5
50.5
11.6
12.7
12.7
12.7
55.5
111
111
4.8
0
TMP92CH21
25.5
148
148
222
9.5
74
74
74
74
22
22
44
39
69
22
22
22
74
0
2009-06-19
Unit
ns