TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 141

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

(2) 16-bit timer mode
TMRA1.
set TA01MOD<TA01M1:0> to “01”.
TMRA1, regardless of the value set in TA01MOD<TA01CLK1:0>. Table 3.7.2 shows
the relationship between the timer (interrupt) cycle and the input clock selection.
and the upper eight bits in TA1REG. Be sure to set TA0REG first (as entering data in
TA0REG temporarily disables the compare, while entering data in TA1REG starts the
compare).
Setting example: To generate an INTTA1 interrupt every 0.4 s at f
3.
A 16-bit interval timer is configured by pairing the two 8-bit timers TMRA0 and
To make a 16-bit interval timer in which TMRA0 and TMRA1 are cascaded together,
In 16-bit timer mode, the overflow output from TMRA0 is used as the input clock for
To set the timer interrupt interval, set the lower eight bits in timer register TA0REG
Comparator output
(TMRA0 match)
TMRA0 up counter
(when TA0REG = 5)
TMRA1 up counter
(when TA1REG = 2)
TMRA1 match output
Making TMRA1 count up on the match signal from the TMRA0 comparator
input clock to TMRA1.
Select 8-bit timer mode and set the comparator output from TMRA0 to be the
Figure 3.7.11 TMRA1 Count Up on Signal from TMRA0
timer registers TA0REG and TA1REG as follows:
If φT16 (=(256/fc)s at f
counting, set the following value in the registers: 0.4 s ÷ =(256/fc)s =
62500 = F424H; e.g. set TA1REG to F4H and TA0REG to 24H.
1
92CH21-139
2
3
1
4
C
= 40 MHz) is used as the input clock for
5
1
2
3
2
4
5
C
= 40 MHz, set the
1
TMP92CH21
2009-06-19
2
1
3